The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 29, 2018

Filed:

Aug. 22, 2016
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Nhon Quach, San Jose, CA (US);

Yanru Li, San Diego, CA (US);

Rahul Gulati, Bangalore, IN;

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 13/00 (2006.01); G06F 11/10 (2006.01); G11C 29/04 (2006.01); G11C 29/52 (2006.01); G06F 3/06 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1068 (2013.01); G06F 3/064 (2013.01); G06F 3/0619 (2013.01); G06F 3/0679 (2013.01); G11C 29/04 (2013.01); G11C 29/52 (2013.01);
Abstract

Systems and methods are disclosed for implementing error correction control regions (ECC) in a memory device without the need to ECC protect the entire memory device. An exemplary method comprises defining one or more ECC regions in a memory device, the memory device coupled to a system on a chip (SoC). An ECC block is provided on the SoC, the ECC block in communication with the one or more ECC regions in the memory device. A determination is made with the ECC block whether to store data in a first of the one or more ECC regions. Responsive to the determination ECC bits are generating for, and interleaved with, the received data and interleaved ECC bits and data are caused to be written to the first ECC region. Otherwise, received data is sent to a non-ECC region of the memory device.


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