The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 22, 2018
Filed:
Mar. 06, 2017
Applicants:
Yuan-ju Chao, Cupertino, CA (US);
Ta-shun Chu, Hsunchu, TW;
Inventors:
Yuan-Ju Chao, Cupertino, CA (US);
Ta-Shun Chu, Hsunchu, TW;
Assignee:
Other;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 5/156 (2006.01); H03K 5/19 (2006.01); G11C 27/02 (2006.01);
U.S. Cl.
CPC ...
H03K 5/1565 (2013.01); G11C 27/02 (2013.01); H03K 5/19 (2013.01);
Abstract
A method of detecting clock duty cycle and adjusting clock duty cycle to achieve a clock with low jitters, low noise, high common mode rejection and high power supply rejection for sampling circuit. Adjusting the duty cycle of the sampling clock can enhance data converter's performance.
Chao, Yuan-Ju. (2018). Programmable duty-cycle low jitter differential clock buffer (U.S. Patent No. 9979382). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9979382
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile