The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 22, 2018
Filed:
Jan. 17, 2017
Fairchild Semiconductor Corporation, Sunnyvale, CA (US);
Aira Lourdes Villamor, Lapu-Lapu, PH;
Erwin Victor Cruz, Koronadal, PH;
Geraldine Suico, Consolacion, PH;
Silnore Sabando, Lapu-Lapu, PH;
Fairchild Semiconductor Corporation, Pheonix, AZ (US);
Abstract
In a general aspect, a packaged semiconductor device can include a semiconductor device and a metal leadframe structure having a signal lead that is electrically coupled with the semiconductor device. The device can also include a molding compound encapsulating at least a portion of the metal leadframe structure. At least a portion of the signal lead can be exposed outside the molding compound. The device can further include a solder plating disposed on exposed portions of the metal leadframe structure. In the device, a flank of the signal lead can have a surface area. At first portion of the surface area of the flank can be defined by the solder plating, and a second portion of the surface area of the flank can be defined by exposed metal of the metal leadframe structure. A perimeter of a surface of the exposed metal can have at least one curved edge.