The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 22, 2018
Filed:
Apr. 24, 2014
Applicant:
Smartrac Technology Gmbh, Dresden, DE;
Inventors:
Assignee:
Other;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/78 (2006.01); B23K 26/53 (2014.01); B23K 26/00 (2014.01); B23K 26/40 (2014.01); H01L 29/34 (2006.01); B23K 101/40 (2006.01); B23K 103/16 (2006.01); B23K 103/00 (2006.01);
U.S. Cl.
CPC ...
H01L 21/78 (2013.01); B23K 26/0006 (2013.01); B23K 26/0057 (2013.01); B23K 26/40 (2013.01); B23K 26/53 (2015.10); H01L 29/34 (2013.01); B23K 2201/40 (2013.01); B23K 2203/172 (2015.10); B23K 2203/50 (2015.10); B23K 2203/56 (2015.10);
Abstract
The invention relates to a method for producing chips () by dividing a wafer along dividing lines () defining dimensions of the chip, wherein a focus () of a preferably pulsed laser radiation () is moved along the dividing lines on a first and at least a second path () within the wafer body, wherein the laser radiation is applied to the wafer from a rear side () of the wafer, and the power density for producing the defects () on the first path () is lower than the power density for producing the defects () on the second path (), and/or the number of defects on the first path is smaller than the number of defects on the second path.