The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 22, 2018

Filed:

Jan. 23, 2017
Applicant:

SK Hynix Inc., Icheon-si, Gyeonggi-do, KR;

Inventors:

Jong Sam Kim, Icheon-si, KR;

Jin Hee Cho, Icheon-si, KR;

Assignee:

SK hynix Inc., Icheon-si, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 17/16 (2006.01); G11C 17/18 (2006.01); G11C 17/14 (2006.01); G11C 29/00 (2006.01);
U.S. Cl.
CPC ...
G11C 29/78 (2013.01); G11C 17/16 (2013.01); G11C 17/18 (2013.01); G11C 29/76 (2013.01); G11C 17/14 (2013.01); G11C 17/143 (2013.01); G11C 17/165 (2013.01);
Abstract

A semiconductor apparatus includes a memory region; a fuse array including a plurality of fuse groups, each fuse group being configured to store a failed address of the memory region; a remaining-fuse information storage unit configured to store remaining-fuse information on a fuse group that includes a fuse corresponding to the failed address among the plurality of fuse groups; and a control unit configured to perform a control operation for updating the remaining-fuse information for the fuse group that includes a fuse corresponding to the failed address among the plurality of fuse groups and for storing the failed address when the failed address is detected.


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