The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 22, 2018

Filed:

Jan. 16, 2015
Applicant:

Intersil Americas Llc, Milpitas, CA (US);

Inventors:

Travis J. Guthrie, Austin, TX (US);

James R. Toker, Cambridge, MA (US);

Narendra B. Kayathi, Austin, TX (US);

Brannon C. Harris, Austin, TX (US);

Assignee:

INTERSIL AMERICAS LLC, Milpitas, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 19/00 (2006.01); H03L 5/00 (2006.01); G01R 19/25 (2006.01); H02M 3/157 (2006.01); H02M 3/158 (2006.01); H02M 1/00 (2006.01); G01R 31/40 (2014.01);
U.S. Cl.
CPC ...
G01R 19/0038 (2013.01); G01R 19/0023 (2013.01); G01R 19/0092 (2013.01); G01R 19/25 (2013.01); G01R 19/2506 (2013.01); H02M 3/157 (2013.01); H02M 3/1584 (2013.01); H03L 5/00 (2013.01); G01R 31/40 (2013.01); H02M 2001/0009 (2013.01);
Abstract

A current measurement circuit may include unbuffered inputs, and the current may be sampled directly from the input pins. The input current created from each sample may be cancelled by injecting opposite charge on the subsequent sample. This direct sampling from the pins increases the common mode input range of the sense path without having to build high linearity rail-to-rail input buffers, hence lowering cost and power consumption of the current measurement path. It also allows for high-impedance input sampling. The measurement circuit may include multiple sampling stages, with a first sampling stage implemented as a switched-capacitor based circuit. A compensator circuit coupled in a feedback loop from the output of the first sampling stage to the input pins may be operated to provide the equivalent charge back to the input pins every cycle to cancel the input current required to charge the sampling capacitors of the first sampling stage.


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