The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 22, 2018
Filed:
Mar. 23, 2016
Applicant:
Infineon Technologies Ag, Neubiberg, DE;
Inventors:
Dietmar Straeussnigg, Villach, AT;
Christian Ebner, Munich, DE;
Ernesto Romani, Munich, DE;
Stephan Mechnig, Munich, DE;
Andreas Wiesbauer, Poertschach, AT;
Christian Jenkner, Klagenfurt, AT;
Assignee:
INFINEON TECHNOLOGIES AG, Neubiberg, DE;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/10 (2006.01); G01L 19/00 (2006.01); H03M 3/00 (2006.01); G01L 9/00 (2006.01); H03L 7/089 (2006.01); G01D 5/24 (2006.01);
U.S. Cl.
CPC ...
G01L 19/00 (2013.01); G01L 9/0072 (2013.01); H03L 7/0891 (2013.01); H03M 3/336 (2013.01); H03M 3/462 (2013.01); H03M 3/496 (2013.01); G01D 5/24 (2013.01);
Abstract
According to an embodiment, a sensor circuit includes a sigma-delta analog to digital converter (ADC), a dithered clock coupled to the sigma-delta ADC, and a supply voltage circuit coupled to the sigma-delta ADC. The sigma-delta ADC is configured to be coupled to a low frequency transducer, and the dithered clock is configured to control of the sigma-delta ADC based on a dithered clock signal.