The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 15, 2018

Filed:

Aug. 29, 2014
Applicant:

Socionext Inc., Yokohama-shi, Kanagawa, JP;

Inventors:

Ian Juso Dedic, Northolt, GB;

Saul Darzy, Edgeware, GB;

Gavin Lambertus Allen, Seabird, AU;

Assignee:

SOCIONEXT INC., Yokohama, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 17/14 (2006.01); H03K 17/16 (2006.01); H03K 17/30 (2006.01); H03M 1/06 (2006.01); H03M 1/66 (2006.01); H03M 1/68 (2006.01); H03M 1/74 (2006.01);
U.S. Cl.
CPC ...
H03K 17/145 (2013.01); H03K 17/162 (2013.01); H03K 17/302 (2013.01); H03M 1/0617 (2013.01); H03M 1/662 (2013.01); H03M 1/687 (2013.01); H03M 1/745 (2013.01); H03M 1/747 (2013.01);
Abstract

Switching circuitry for use in a digital-to-analog converter, the circuitry comprising: a common node; first and second output nodes; and a plurality of switches connected between the common node and the first and second output nodes and operable in each clock cycle of a series of clock cycles, based on input data, to conductively connect the common node to either the first or second output node along a given one of a plurality of paths, wherein the circuitry is arranged such that a data-controlled switch and a clock-controlled switch are provided in series along each said path from the common node to the first or second output node.


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