The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 15, 2018
Filed:
Jul. 27, 2017
Hongliang Wang, Kingston, CA;
Yan-fei Liu, Kingston, CA;
Hongliang Wang, Kingston, CA;
Yan-Fei Liu, Kingston, CA;
Other;
Abstract
Hybrid modulation strategies are provided for single phase and three phase inverter topologies. According to hybrid modulation strategy embodiments, one line frequency period is divided into two operation modes based on the polarities of output voltage and output current. When polarities of the output voltage and output current are the same, a nominal voltage level modulation is used to generate the output voltage. When polarities of the output voltage and output current are opposite, a lower voltage level modulation is used to generate the output voltage. In one embodiment, a nominal voltage level modulation is five voltage level modulation, and a lower voltage level modulation is three or two voltage level modulation. Embodiments allow inverters to be constructed with fewer switches, and improve performance of multilevel inverters. The hybrid modulation strategies may be implemented in multilevel inverters such as active neutral point clamped (ANPC) and neutral point clamped (NPC) inverters.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile