The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 15, 2018
Filed:
Dec. 02, 2016
Korea Institute of Industrial Technology, Chungcheongnam-do, KR;
Chae Hwan Jeong, Gwangju, KR;
Jong Hwan Lee, Daejeon, KR;
Chang Heon Kim, Gwangju, KR;
Ho Sung Kim, Gyeonggi-do, KR;
KOREA INSTITUTE OF INDUSTRIAL TECHNOLOGY, Chungcheongnam-do, KR;
Abstract
One embodiment of the present invention relates to a method for manufacturing solar cells having a nano-micro composite structure on a silicon substrate and solar cells manufactured thereby. The technical problem to be solved is to provide a method for manufacturing solar cells and solar cells manufactured thereby, the method being capable of forming micro wires in various sizes according to the lithographic design of a photoresist and forming nano wires, which have various sizes and aspect ratios, by adjusting the concentration of a wet etching solution and immersion time. To this end, the present invention provides a method for manufacturing solar cells and solar cells manufactured thereby, the method comprising the steps of: preparing a first conductive semiconductor substrate having a first surface and a second surface; patterning a photoresist on the second surface of the first conductive semiconductor substrate such that the plane form of the photoresist becomes a form in which multiple horizontal lines and multiple vertical lines intersect each other; electrolessly etching the semiconductor substrate so as to form a micro wire having a width of 1-3 μm and a height of 3-5 μm in a region corresponding to the photoresist and to form multiple nano wires having a width of 1-100 nm and a height of 1-3 μm in a region not corresponding to the photoresist; doping the micro wire and nano wires with a second conductive impurity by using POCl; forming a first electrode on the first surface of the semiconductor substrate; and forming a second electrode on the micro wire, wherein the efficiency of the solar cells is 10-13%, the efficiency being the ratio of output to incident light energy per unit area.