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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9971605 B1

PDFFull Text
Date of Patent:
May. 15, 2018

Filed:

May. 19, 2014

Selective designation of multiple cores as bootstrap processor in a multi-core microprocessor

Applicant:

Via Technologies, Inc., New Taipei, TW;

Inventors:

G. Glenn Henry, Austin, TX (US);

Stephan Gaskins, Austins, TX (US);

Assignee:

VIA TECHNOLOGIES, INC., New Taipei, TW;

Attorney:

McClure, Qualey & Rodack, LLP

Primary Examiner:

Kim Huynh

Assistant Examiner:

Kevin Stewart

Int. Cl.
CPC ...
G06F 9/44 (2006.01); G06F 9/38 (2018.01); G06F 1/32 (2006.01); G06F 12/084 (2016.01); G06F 13/24 (2006.01); G06F 13/364 (2006.01); G06F 12/0808 (2016.01); G06F 9/30 (2018.01); G06F 12/0875 (2016.01); G06F 1/04 (2006.01); G06F 1/12 (2006.01); G06F 13/42 (2006.01); G06F 21/53 (2013.01); G06F 21/57 (2013.01); H04L 9/08 (2006.01); H01L 21/66 (2006.01);
U.S. Cl.
CPC ...
G06F 9/3885 (2013.01); G06F 1/04 (2013.01); G06F 1/12 (2013.01); G06F 1/3203 (2013.01); G06F 1/324 (2013.01); G06F 1/3237 (2013.01); G06F 1/3287 (2013.01); G06F 1/3296 (2013.01); G06F 9/30032 (2013.01); G06F 9/30047 (2013.01); G06F 9/30079 (2013.01); G06F 9/30087 (2013.01); G06F 9/30105 (2013.01); G06F 9/30145 (2013.01); G06F 9/3802 (2013.01); G06F 9/3861 (2013.01); G06F 9/4403 (2013.01); G06F 9/4405 (2013.01); G06F 9/4411 (2013.01); G06F 9/4418 (2013.01); G06F 12/084 (2013.01); G06F 12/0808 (2013.01); G06F 12/0875 (2013.01); G06F 13/24 (2013.01); G06F 13/364 (2013.01); G06F 13/42 (2013.01); G06F 21/53 (2013.01); G06F 21/57 (2013.01); G06F 2212/452 (2013.01); G06F 2212/6028 (2013.01); G06F 2212/62 (2013.01); H01L 22/34 (2013.01); H04L 9/0877 (2013.01); H04L 9/0897 (2013.01); Y02B 60/1217 (2013.01); Y02B 60/1221 (2013.01); Y02B 60/1282 (2013.01); Y02B 60/1285 (2013.01); Y02B 60/32 (2013.01); Y02D 10/126 (2018.01); Y02D 10/128 (2018.01); Y02D 10/171 (2018.01); Y02D 10/172 (2018.01); Y02D 50/20 (2018.01);
Abstract

A microprocessor includes an indicator and a plurality of processing cores. Each of the plurality of processing cores is configured to sample the indicator. When the indicator indicates a first predetermined value, the plurality of processing cores are configured to collectively designate multiple of the plurality of processing cores to be a bootstrap processor. When the indicator indicates a second predetermined value distinct from the first predetermined value, the plurality of processing cores are configured to collectively designate a single processing core of the plurality of processing cores to be the bootstrap processor.

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