The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 08, 2018
Filed:
Aug. 01, 2016
Applicant:
SK Hynix Inc., Icheon-si, Gyeonggi-do, KR;
Inventor:
Jung Ho Lim, Icheon-si Gyeonggi-do, KR;
Assignee:
SK hynix Inc., Icheon-si, Gyeonggi-do, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/0185 (2006.01); H03K 19/0948 (2006.01);
U.S. Cl.
CPC ...
H03K 19/018521 (2013.01); H03K 19/0948 (2013.01);
Abstract
A semiconductor integrated circuit device may include a main inverter and a negative bias temperature instability (NBTI) compensating circuit. The main inverter may be configured to receive an input signal. The main inverted may be configured to reverse the input signal. The main inverter may include a PMOS transistor and an NMOS transistor. The NBTI compensating circuit may be configured to receive the input signal. The NBTI compensating circuit may be selectively driven in an operation start time section of the PMOS transistor in the main inverter to compensate a driving force of the PMOS transistor.