The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 08, 2018

Filed:

Dec. 31, 2015
Applicant:

Csi Cells Co., Ltd, Suzhou, Jiangsu, CN;

Inventors:

Shuai Zou, Suzhou, CN;

Weixu Long, Suzhou, CN;

Xusheng Wang, Suzhou, CN;

Guoqiang Xing, Suzhou, CN;

Assignee:

CSI CELLS CO., LTD, Jiangsu, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 31/0236 (2006.01); H01L 31/068 (2012.01); H01L 31/18 (2006.01);
U.S. Cl.
CPC ...
H01L 31/02363 (2013.01); H01L 31/068 (2013.01); H01L 31/1868 (2013.01);
Abstract

A process for preparing a passivated emitter rear contact solar cell, which includes the steps as follows: removing the damaged layer on the surface of the silicon wafer and at the same time polishing both surfaces, texturing, forming PN junction, etching, removing the glass impurity, depositing a passivation film on the back surface, depositing a passivating antireflective layer on the front surface, making local openings on the back surface, screen printing of metal paste on both the front surface and the back surface and sintering, in which the texturing step employs a catalytic metal etching approach, and the textured structure is a nanometer-level textured structure. The present invention has combined removing the damaged layer on the surface of the silicon wafer and polishing both the front and back surfaces into one single step, and thus has simplified the production process and reduced the production cost.


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