The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 08, 2018

Filed:

Mar. 04, 2015
Applicant:

Hitachi Consumer Electronics Co., Ltd., Yokohama-shi, Kanagawa, JP;

Inventors:

Masakazu Ikeda, Tokyo, JP;

Jyunya Iizuka, Tokyo, JP;

Yusuke Nakamura, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11B 7/00 (2006.01); G11B 20/18 (2006.01); G11B 7/0065 (2006.01); G03H 1/22 (2006.01); G03H 1/02 (2006.01); G03H 1/04 (2006.01);
U.S. Cl.
CPC ...
G11B 20/18 (2013.01); G11B 7/0065 (2013.01); G03H 1/02 (2013.01); G03H 1/0402 (2013.01); G03H 1/2202 (2013.01); G03H 2001/0224 (2013.01); G03H 2001/2244 (2013.01);
Abstract

An error correction block generated by performing error correction coding to the user data is divided into b number of sectors (b: a natural number), each sector having a number of bits (a: a natural number), the sector is divided into c number of sub-sectors (c: a natural number) and bits are distributed to each of the c number of sub-sectors, arrangement order of the bits is randomized for each sub-sector to which the bits are distributed, the c number of sub-sectors in which the arrangement order of the bits is randomized are combined to generate an interleaved sector, the interleaved sector is divided into c/d (d: a natural number, c≠d, and c>d) and e number of divided interleaved sectors (e: a natural number, e≠b, and b>e) are combined to generate a pre-modulation block, which is modulated by a modulation rule.


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