The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 08, 2018

Filed:

Oct. 16, 2015
Applicant:

Seiko Epson Corporation, Tokyo, JP;

Inventors:

Tsuyoshi Tamura, Suwagun-Haramura, JP;

Takeshi Nomura, Shiojiri, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G09G 3/32 (2016.01); G09G 3/20 (2006.01); G09G 3/3208 (2016.01);
U.S. Cl.
CPC ...
G09G 3/2092 (2013.01); G09G 3/3208 (2013.01); G09G 2300/0861 (2013.01); G09G 2310/0248 (2013.01); G09G 2310/0289 (2013.01); G09G 2310/0297 (2013.01); G09G 2320/0209 (2013.01);
Abstract

A plurality of pixel circuits provided in a display apparatus respectively include light-emitting elements OLED, first transistors that supply driving currents to the light-emitting elements, second transistors that turn on and off connection between data lines and gates of the first transistors, and third transistors. The display apparatus has first holding capacitors that are spectively inserted and connected midway on the plurality of data lines and shift levels of driving voltages of the first transistors, and holding capacitors that respectively hold potentials of the plurality of data lines. N first holding capacitors are arranged in a column direction Y, each of the first holding capacitors having an electrode width that is smaller than a width of N pixel circuits arranged adjacent to each other in a row direction X, and that is equal to or larger than a width of one pixel circuit.


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