The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 08, 2018

Filed:

Mar. 15, 2013
Applicant:

Avago Technologies General Ip (Singapore) Pte. Ltd, Singapore, SG;

Inventors:

Horia Simionescu, Foster City, CA (US);

Siddartha Kumar Panda, Bangalore, IN;

Kunal Sablok, Bangalore, IN;

Veera Kumar Reddy Oleti, Bangalore, IN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/08 (2016.01); G06F 12/0893 (2016.01); G06F 12/0888 (2016.01); G06F 12/0815 (2016.01); G06F 12/0802 (2016.01); G06F 12/0804 (2016.01);
U.S. Cl.
CPC ...
G06F 12/0893 (2013.01); G06F 12/0802 (2013.01); G06F 12/0804 (2013.01); G06F 12/0815 (2013.01); G06F 12/0888 (2013.01);
Abstract

An apparatus having a cache and a circuit is disclosed. The cache includes a plurality of cache lines. The cache is configured to (i) store a plurality of data items in the cache lines and (ii) generate a map that indicates a dirty state or a clean state of each of the cache lines. The cache also has a write-back policy to a memory. The circuit is configured to (i) check a location in the map corresponding to a read address of a read request and (ii) obtain read data directly from the memory by bypassing the cache in response to the location having the clean state.


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