The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9960179 B1

PDF
Full Text
Expired
Date of Patent:
May. 01, 2018

Filed:

Mar. 20, 2017
Applicant:

Toshiba Memory Corporation, Minato-ku, JP;

Inventor:

Kenta Yamada, Yokkaichi, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/792 (2006.01); H01L 27/11582 (2017.01); H01L 27/1157 (2017.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01); H01L 23/532 (2006.01); H01L 29/04 (2006.01); H01L 29/16 (2006.01); H01L 21/28 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11582 (2013.01); H01L 21/28282 (2013.01); H01L 23/528 (2013.01); H01L 23/5226 (2013.01); H01L 23/53295 (2013.01); H01L 27/1157 (2013.01); H01L 29/04 (2013.01); H01L 29/16 (2013.01);
Abstract

A semiconductor memory device includes a conductive layer; electrode layers stacked on the conductive layer; an insulating body extending through the electrode layers; and a semiconductor layer positioned between the insulating body and the electrode layers. The plurality of electrode layers include a first electrode layer, a second electrode layer provided between the conductive layer and the first electrode layer, and a third electrode layer provided between the conductive layer and the second electrode layer, and the semiconductor layer has a first layer thickness between the insulating body and the first electrode layer, a second layer thickness between the insulating body and the second electrode layer and a third layer thickness between the insulating body and the third electrode layer. The first layer thickness is thinner than the second layer thickness, and the second layer thickness is thinner than the third layer thickness.


Find Patent Forward Citations

Yamada, Kenta. (2018). Semiconductor memory device and method for manufacturing same (U.S. Patent No. 9960179). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9960179

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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