The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 01, 2018

Filed:

Feb. 27, 2015
Applicant:

U.s. Army Research Laboratory Attn: Rdrl-loc-i, Adelphi, MD (US);

Inventors:

Daniel M. Baechle, Rosedale, MD (US);

Daniel J. O'Brien, Hydes, MD (US);

Eric D. Wetzel, Baltimore, MD (US);

Oleg B. Yurchak, Montgomery Village, MD (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01G 7/00 (2006.01); H01G 4/30 (2006.01); H01G 4/16 (2006.01); H01G 4/18 (2006.01); H01G 4/232 (2006.01); H01G 4/20 (2006.01);
U.S. Cl.
CPC ...
H01G 4/30 (2013.01); H01G 4/16 (2013.01); H01G 4/18 (2013.01); H01G 4/203 (2013.01); H01G 4/232 (2013.01);
Abstract

A structural capacitor having a plurality of planar dielectric layers and a plurality of positive and negative electrodes with the positive and negative electrodes alternating between each dielectric layer and methods for making structural capacitors are provided. First and second spaced apart holes are provided through each dielectric layer as well as the electrodes so that the first holes in the electrodes register with the first holes in the dielectric layer and likewise for the second holes. The capacitor is formed by stacking the dielectric layers and electrodes on two spaced apart alignment pins with a positive alignment pin extending through the first holes and a negative alignment pin extending through the second holes in the dielectric layers and electrodes. These alignment pins maintain layer alignment during subsequent thermal and pressure processing to bond together the dielectric and electrode layers into an integral structural material. After processing, the alignment pins are removed and replaced with electrode pins, where the positive electrode pin is in electrical contact only with the positive electrodes and the negative electrode pin is in electrical contact only with the negative electrodes. The electrode pins are used for subsequent electrical and mechanical connectorization to the structural capacitor.


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