The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 01, 2018

Filed:

Oct. 31, 2017
Applicant:

Renesas Electronics Corporation, Tokyo, JP;

Inventors:

Yuichiro Ishii, Tokyo, JP;

Atsushi Miyanishi, Tokyo, JP;

Kazumasa Yanagisawa, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 5/14 (2006.01); G11C 11/417 (2006.01); H01L 27/11 (2006.01); H01L 23/528 (2006.01); H01L 29/10 (2006.01);
U.S. Cl.
CPC ...
G11C 11/417 (2013.01); H01L 23/5286 (2013.01); H01L 27/1104 (2013.01); H01L 27/1116 (2013.01); H01L 29/1095 (2013.01);
Abstract

A semiconductor device including an active mode and a standby mode as operation modes, includes: a first power source line which accepts the supply of power in the active mode; a second power source line which accepts the supply of power in the active mode and the standby mode; a memory circuit to be coupled with the first and second power source lines; and a first switch which electrically couples the first power source line with the second power source line in the active mode and electrically decouples the first power source line from the second power source line in the standby mode. The memory circuit includes a memory array to be coupled with the second power source line, a peripheral circuit to be coupled with the first power source line, and a second switch which electrically couples the first power source line with the second power source line.


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