The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 01, 2018
Filed:
Mar. 11, 2016
Applicant:
Kabushiki Kaisha Toshiba, Tokyo, JP;
Inventors:
Daisuke Saida, Tokyo, JP;
Susumu Takeda, Kanagawa, JP;
Hiroki Noguchi, Kanagawa, JP;
Kazuhiko Abe, Tokyo, JP;
Assignee:
Kabushiki Kaisha Toshiba, Tokyo, JP;
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01); G11C 7/12 (2006.01); G11C 11/16 (2006.01); G11C 29/02 (2006.01); G11C 11/18 (2006.01); G06F 12/0811 (2016.01);
U.S. Cl.
CPC ...
G11C 11/1659 (2013.01); G06F 12/0811 (2013.01); G11C 7/12 (2013.01); G11C 11/161 (2013.01); G11C 11/1673 (2013.01); G11C 11/1675 (2013.01); G11C 11/1693 (2013.01); G11C 11/18 (2013.01); G11C 29/023 (2013.01); G11C 29/028 (2013.01); G06F 2212/222 (2013.01); G06F 2212/502 (2013.01); G06F 2212/601 (2013.01); Y02B 60/1225 (2013.01);
Abstract
A memory system has a non-volatile memory of which access speed is electrically controlled, a control circuitry that selects a first region which is a portion of a memory region of the non-volatile memory, and a boost circuit that adjusts an access speed of the first region to be higher than an access speed of a second region different from the first region in the memory region.