The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 01, 2018

Filed:

Jul. 25, 2016
Applicant:

Synaptics Japan Gk, Tokyo, JP;

Inventors:

Keiichi Itoigawa, Tokyo, JP;

Yoshihiko Hori, Tokyo, JP;

Tomomitsu Kitamura, Tokyo, JP;

Takefumi Seno, Tokyo, JP;

Hideaki Kuwada, Tokyo, JP;

Takashi Tamura, Tokyo, JP;

Jun Kurosawa, Tokyo, JP;

Kazuhiko Kanda, Tokyo, JP;

Assignee:

Synaptics Japan GK, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/00 (2006.01); G09G 3/20 (2006.01); H03L 7/00 (2006.01); G09G 5/00 (2006.01);
U.S. Cl.
CPC ...
G09G 3/2096 (2013.01); G09G 5/008 (2013.01); H03L 7/00 (2013.01); G09G 2300/0408 (2013.01); G09G 2300/0426 (2013.01); G09G 2310/0202 (2013.01); G09G 2310/0291 (2013.01); G09G 2352/00 (2013.01);
Abstract

A semiconductor device includes first to sixth external connection terminals, a first receiver connected to the first and second external connection terminals, a second receiver connected to the third and fourth external connection terminals, a third receiver connected to the fifth and sixth external connection terminals, a C-PHY block, a D-PHY block and a main processing section. The C-PHY block is configured to generate first reception data by performing signal processing on signals received from the first, second and third receivers in accordance with the MIPI C-PHY specification. The D-PHY block is configured to generate second reception data by performing signal processing on signals received from the first, second and third receivers in accordance with the MIPI D-PHY specification. The main processing section is configured to selectively receive the first and second reception data and perform desired processing on the received data.


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