The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 01, 2018

Filed:

Aug. 29, 2016
Applicants:

Boe Technology Group Co., Ltd., Beijing, CN;

Beijing Boe Display Technology Co., Ltd., Beijing, CN;

Inventors:

Jinchao Bai, Beijing, CN;

Huibin Guo, Beijing, CN;

Yao Liu, Beijing, CN;

Xiangqian Ding, Beijing, CN;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G02F 1/1362 (2006.01); G02F 1/1343 (2006.01); G02F 1/1368 (2006.01);
U.S. Cl.
CPC ...
G02F 1/136227 (2013.01); G02F 1/1368 (2013.01); G02F 1/13439 (2013.01); G02F 1/136286 (2013.01); G02F 2001/136236 (2013.01); G02F 2201/121 (2013.01); G02F 2201/123 (2013.01);
Abstract

An array substrate and a manufacturing method thereof, a display panel and a display device are disclosed. The method for manufacturing an array substrate includes: forming a first via hole for connecting a second transparent electrically conductive layer and a gate line layer, a second via hole for connecting a first transparent electrically conductive layer and the second transparent electrically conductive layer, and a third via hole for connecting the second transparent electrically conductive layer and a source/drain electrode layer on a base substrate through patterning process; performing a filling process on the first via hole, the second via hole and the third via hole during a pattern of second transparent electrically conductive layer is being formed, such that each of the three via holes has a top surface which is flush with the second transparent electrically conductive layer surrounding the respective via holes.


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