The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 01, 2018

Filed:

Aug. 28, 2015
Applicant:

Oracle International Corporation, Redwood City, CA (US);

Inventors:

Stephanie Moran, San Francisco, CA (US);

Michael C. Freda, Morgan Hill, CA (US);

Karl Sauter, Pleasanton, CA (US);

Assignee:

Oracle International Corporation, Redwood Shores, unknown;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 31/28 (2006.01); H05K 1/11 (2006.01); H05K 1/02 (2006.01); H05K 3/46 (2006.01); H05K 1/16 (2006.01); H05K 3/00 (2006.01);
U.S. Cl.
CPC ...
G01R 31/2813 (2013.01); H05K 1/0266 (2013.01); H05K 1/0268 (2013.01); H05K 1/0298 (2013.01); H05K 1/11 (2013.01); H05K 3/0097 (2013.01); H05K 3/4679 (2013.01); H05K 1/167 (2013.01); H05K 3/0052 (2013.01); H05K 2201/097 (2013.01); H05K 2201/09381 (2013.01); H05K 2201/09636 (2013.01); H05K 2201/09781 (2013.01); H05K 2203/166 (2013.01);
Abstract

A method and apparatus for determining misregistration of internal layers of a PCB using resistance measurements is disclosed. In one embodiment, a method includes measuring a first resistance between a first center terminal and a first peripheral terminal of a first registration coupon on a printed circuit board (PCB) panel including at least one PCB. The method further includes measuring a second resistance between the first center terminal and a second peripheral terminal of the first registration coupon, wherein the first and second peripheral terminals are associated with a first internal layer of the PCB. A difference between the first and second resistances is then calculated. Then, based on this difference, a determination is made of a distance of misregistration of the first internal layer, if any, along a first axis.


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