The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 24, 2018

Filed:

Apr. 24, 2015
Applicant:

Nec Corporation, Tokyo, JP;

Inventor:

Shinichi Hori, Tokyo, JP;

Assignee:

NEC CORPORATION, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 3/217 (2006.01); H03F 1/22 (2006.01); H03F 3/193 (2006.01); H04B 1/04 (2006.01);
U.S. Cl.
CPC ...
H03F 3/2171 (2013.01); H03F 1/223 (2013.01); H03F 3/193 (2013.01); H04B 1/04 (2013.01); H03F 3/217 (2013.01); H03F 3/2173 (2013.01); H03F 2200/258 (2013.01); H03F 2200/432 (2013.01); H03F 2200/451 (2013.01);
Abstract

A switching amplifier provided, at a minimum, with: a first input transistor into which one of two input signals that operate in a complementary manner is input; a first cascode transistor cascade-connected between the first input transistor and a power supply; a second input transistor into which the other of the two input signals is input; and a second cascode transistor cascade-connected between the second input transistor and the first input transistor; the switching amplifier extracting an output signal, a connection point between the first input transistor and the second cascode transistor being used as an output terminal; wherein a first potential limiting circuit and a second potential limiting circuit for limiting the potential fluctuation range are respectively connected to the input terminal of the first cascode transistor and the input terminal of the second cascode transistor.


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