The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 24, 2018

Filed:

Jan. 28, 2016
Applicant:

Renesas Electronics Corporation, Tokyo, JP;

Inventors:

Kinya Ohtani, Tokyo, JP;

Yasuhiro Nishimura, Tokyo, JP;

Assignee:

Renesas Electronics Corporation, Koutou-ku, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 29/423 (2006.01); H01L 21/265 (2006.01); H01L 29/06 (2006.01); H01L 21/266 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7813 (2013.01); H01L 21/26513 (2013.01); H01L 29/0634 (2013.01); H01L 29/4236 (2013.01); H01L 29/66734 (2013.01); H01L 29/7811 (2013.01); H01L 21/266 (2013.01);
Abstract

In order to improve the performance of a semiconductor device, a p type impurity is ion implanted into an area of an n type semiconductor film that is epitaxially grown over a p type semiconductor substrate, and the p type impurity is not ion implanted into an area of the n type semiconductor film, which is adjacent to the area in which the p type impurity is ion implanted. In this way, a ptype drift layer comprised of the area in which the p type impurity is introduced, as well as an ntype semiconductor region comprised of the area in which the p type impurity is not introduced are formed.


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