The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 24, 2018

Filed:

Apr. 22, 2015
Applicant:

Samsung Display Co., Ltd., Yongin, KR;

Inventors:

Dong Gun Oh, Osan-si, KR;

Seunghyun Park, Seoul, KR;

JiEun Lee, Seoul, KR;

Cheol-Gon Lee, Seoul, KR;

Woongki Jeon, Yongin-si, KR;

Assignee:

Samsung Display Co., Ltd., Yongin-si, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/32 (2006.01); G02F 1/1368 (2006.01); G02F 1/1362 (2006.01); H01L 51/52 (2006.01);
U.S. Cl.
CPC ...
H01L 27/3262 (2013.01); G02F 1/1368 (2013.01); G02F 1/136286 (2013.01); G02F 2201/40 (2013.01); H01L 27/3248 (2013.01); H01L 27/3276 (2013.01); H01L 51/5209 (2013.01); H01L 51/5225 (2013.01);
Abstract

A display apparatus includes a first substrate including a channel-forming area, a second substrate facing the first substrate, a thin-film transistor disposed on the first substrate, a pixel electrode electrically connected to the thin-film transistor, a gate line disposed on the first substrate and electrically connected to the thin-film transistor, a data line electrically connected to the thin-film transistor and divided into at least two portions such that the channel-forming area is disposed between the two portions of the data line, and a connection portion electrically connecting the two portions of the data line to each other, in which the thin-film transistor includes a gate electrode branched from the gate line and overlapping the channel-forming area, a semiconductor pattern overlapping the gate electrode and contacting the two portions of the data line so that the channel-forming area is disposed in the semiconductor pattern, and a drain electrode electrically connected to the pixel electrode and overlapping the semiconductor pattern.


Find Patent Forward Citations

Loading…