The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 24, 2018

Filed:

Apr. 16, 2015
Applicant:

Canon Kabushiki Kaisha, Tokyo, JP;

Inventors:

Takuya Kondo, Chigasaki, JP;

Shoji Matsumoto, Yokohama, JP;

Seiji Hayashi, Yokohama, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/00 (2006.01); H01B 3/40 (2006.01); H01L 23/498 (2006.01); H05K 3/28 (2006.01); H05K 1/02 (2006.01); H05K 3/34 (2006.01);
U.S. Cl.
CPC ...
H01B 3/40 (2013.01); H01L 23/49816 (2013.01); H01L 23/49827 (2013.01); H05K 3/284 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/73204 (2013.01); H05K 1/0231 (2013.01); H05K 3/3436 (2013.01); H05K 2201/0209 (2013.01); H05K 2201/10977 (2013.01);
Abstract

A printed circuit board has a printed wiring board and a semiconductor package mounted on the printed wiring board. The printed wiring board and the semiconductor package are connected with a plurality of solder balls. An underfill material covering the plurality of solder balls is filled between the printed wiring board and the semiconductor package. The underfill material has a relative dielectric constant of 8.6 or more and 54.4 or less. Thus, crosstalk noise generated in wiring in the out-of-plane direction is reduced without increasing the mounting area.


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