The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 24, 2018

Filed:

Oct. 26, 2015
Applicant:

Shenzhen China Star Optoelectronics Technology Co., Ltd., Shenzhen, CN;

Inventors:

Jimu Kuang, Shenzhen, CN;

Chihhao Wu, Shenzhen, CN;

Houliang Hu, Shenzhen, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/3266 (2016.01); G09G 3/3275 (2016.01); G09G 3/3225 (2016.01);
U.S. Cl.
CPC ...
G09G 3/3266 (2013.01); G09G 3/3225 (2013.01); G09G 3/3275 (2013.01); G09G 2310/0243 (2013.01); G09G 2310/0291 (2013.01); G09G 2310/08 (2013.01);
Abstract

The present invention provides an OLED gate driving circuit structure, comprising an OLED panel, a gate charge/discharge driving circuit, a logic process unit and a source driving circuit; the gate charge/discharge driving circuit is located at one side of the OLED panel, and the gate charge/discharge driving circuit comprises a plurality of output ends, and each output end is electrically coupled to the logic process unit with one signal line; the logic process unit is located inside the OLED panel, and the logic process unit receives a scan signal transmitted by the gate charge/discharge driving circuit through the signal line, and converts the scan signal into a discharge scan signal and a charge scan signal to be provided to the OLED panel; the source driving circuit is coupled to the OLED panel, and provides a data signal to the OLED panel, and only one gate driving integrated circuit is utilized in the structure for achieving the charge and discharge procedures of the gate driving circuit to save the hardware cost and to simplify the panel layout circuit and to make the frame of the panel narrower.


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