The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 24, 2018
Filed:
Mar. 12, 2014
Veriscape, Inc., Los Alamos, NM (US);
Gary C. Berkowitz, Centennial, CO (US);
Charles Wurtz, Los Alamos, NM (US);
Veriscape, Inc., Los Alamos, NM (US);
Abstract
Present invention embodiments enable the handling of various index-memory architectures for a virtual supercomputer that would allow for a heterogeneous storage of variable length index words with non-sequential addressing, and also dynamic changes to the index-memory architecture. A computer-implemented system, method, and apparatus allow for different types of node index memory (NIM) architectures for the virtual supercomputer. The first type allows for homogenous NIM segments, and implementing sequential node-number addressing. A second type of architecture allows for heterogeneous IW configurations (variable length and field structure), but sill uses sequential node-number addressing. A third type allows for non-sequential node-number addressing, but still uses homogeneous IW configurations. To implement this, a new virtual hardware element is required, an Index-Word Address Table. The fourth type of architecture is a fully variable random-access architecture, whereby index-words are not sequential, nor are they identically configured. This also requires the Index-Word Address Table.