The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 24, 2018
Filed:
Mar. 11, 2015
Applicant:
Sandisk Technologies Llc, Plano, TX (US);
Inventors:
Rohit Hassan Sathyanarayan, Bangalore, IN;
Vinay Sandeep, Bangalore, IN;
Assignee:
SANDISK TECHNOLOGIES LLC, Plano, TX (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01); G06F 11/16 (2006.01); G06F 12/06 (2006.01); G11C 8/12 (2006.01); G11C 16/10 (2006.01); G11C 29/00 (2006.01); G06F 11/20 (2006.01); G11C 7/10 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0619 (2013.01); G06F 3/0613 (2013.01); G06F 3/0659 (2013.01); G06F 3/0685 (2013.01); G06F 3/0688 (2013.01); G06F 11/167 (2013.01); G06F 11/1666 (2013.01); G06F 12/0638 (2013.01); G11C 8/12 (2013.01); G11C 16/10 (2013.01); G11C 29/74 (2013.01); G11C 29/765 (2013.01); G06F 11/20 (2013.01); G06F 2212/7208 (2013.01); G11C 7/1045 (2013.01);
Abstract
Identical data is written to multiple nonvolatile memory chips connected to a memory bus by sending address information to a first nonvolatile memory chip and a second nonvolatile memory chip, selecting the first and second nonvolatile memory chips, while the first nonvolatile and second nonvolatile memory chips are both selected, sending user data over the memory bus to the first and second nonvolatile memory chips in parallel, and programming the user data in the first nonvolatile memory chip and the second nonvolatile memory chip in parallel.