Clamp circuit to suppress reference voltage variation in a voltage regulator

Abstract

A semiconductor integrated circuit includes a control transistor, a control circuit, a reference circuit, a current source, and a stabilizing circuit including a first transistor whose base is connected to a node to receive the reference voltage. The reference circuit includes series-connected second transistor and first and second resistors, third and fourth transistors and third and fourth resistors, and fifth and sixth transistors. The fifth transistor has connected base and collector, which base is connected to a base of the third transistor, the second transistor has a base connected to a node between third and fourth transistors, fourth and sixth transistors have bases connected to a first node between first and second resistors or a second node between second transistor and first resistor, a potential at the first or second node is the reference voltage, and a gain is determined depending on a resistance of the first resistor.