The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9952500 B1

PDF
Full Text
Expired
Date of Patent:
Apr. 24, 2018

Filed:

Aug. 17, 2016
Applicant:

Globalfoundries Inc., Grand Cayman, KY;

Inventors:

Sudeep Mandal, Bangalore, IN;

Arun S. Mampazhy, Bangalore, IN;

Assignee:

GLOBALFOUNDRIES INC., Grand Cayman, KY;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01); G03F 1/36 (2012.01);
U.S. Cl.
CPC ...
G03F 1/36 (2013.01); G06F 17/5081 (2013.01);
Abstract

Embodiments of the present disclosure include methods, program products, and systems for adjusting an integrated circuit (IC) layout for optical proximity correction (OPC). Methods according to the disclosure can include: defining a target region of the IC design layout, the target region having a plurality of patterns including a first pattern positioned adjacent to a second pattern, wherein an OPC modeling rule of the IC design layout prohibits the first pattern from being adjusted, and wherein the second pattern does not reduce a printability metric of the first pattern; adjusting the design of the second pattern to reduce at least one printing error in the first pattern, wherein a functionality of the second pattern in the IC design layout is unchanged after the adjusting; and implementing OPC on the IC design layout including the target region with the adjusted second pattern therein.


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