The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 24, 2018

Filed:

Jan. 12, 2016
Applicant:

Apple Inc., Cupertino, CA (US);

Inventors:

Kingsuk Brahma, San Francisco, CA (US);

David A. Stronks, San Jose, CA (US);

Hopil Bae, Sunnyvale, CA (US);

Wei H. Yao, Palo Alto, CA (US);

Assignee:

Apple Inc., Cupertino, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/36 (2006.01); G01R 27/20 (2006.01); G09G 3/20 (2006.01); G09G 3/00 (2006.01);
U.S. Cl.
CPC ...
G01R 27/205 (2013.01); G09G 3/006 (2013.01); G09G 3/2092 (2013.01); G09G 3/2096 (2013.01); G09G 3/3607 (2013.01); G09G 3/3696 (2013.01); G09G 2300/0426 (2013.01); G09G 2310/08 (2013.01); G09G 2320/0223 (2013.01);
Abstract

A display may have a substrate layer to which a display driver integrated circuit and flexible printed circuit are bonded. The display driver integrated circuit may be provided with switches and control circuitry for controlling the operation of the switches during bond resistance measurements. Test equipment may apply currents to pads in the display driver integrated circuit through contacts in the flexible printed circuit while controlling the switching circuitry. Based on these measurements and the measurement of trace resistances in a dummy flexible printed circuit, the test equipment may determine bond resistances for bonds between the display driver integrated circuit and the display substrate and between the flexible printed circuit and the display substrate. Displays may have master and slave display driver integrated circuits that share coarse reference voltages produced by the master from raw power supply voltages.


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