The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 17, 2018
Filed:
Dec. 02, 2016
Qualcomm Incorporated, San Diego, CA (US);
Venkat Narayanan, San Diego, CA (US);
Rakesh Vattikonda, San Diego, CA (US);
De Lu, San Diego, CA (US);
Ramaprasath Vilangudipitchai, San Diego, CA (US);
Samrat Sinharoy, San Diego, CA (US);
Rui Chen, San Diego, CA (US);
QUALCOMM Incorporated, San Diego, CA (US);
Abstract
In one embodiment, a voltage level shifter includes a first p-type metal-oxide-semiconductor (PMOS) transistor having a gate configured to receive an input signal in a first power domain, and a second PMOS transistor, wherein the first and second PMOS transistors are coupled in series between a supply voltage of a second power domain and a node. The voltage level shifter also includes an inverter having an input coupled to the node and an output coupled to a gate of the second PMOS transistor, and a first n-type metal-oxide-semiconductor (NMOS) transistor having a gate configured to receive the input signal in the first power domain, wherein the first NMOS transistor is coupled between the node and a ground.