The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 17, 2018

Filed:

Aug. 18, 2016
Applicant:

Kabushiki Kaisha Toshiba, Minato-ku, JP;

Inventor:

Kazutaka Takagi, Kawasaki, JP;

Assignee:

Kabushiki Kaisha Toshiba, Minato-ku, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/66 (2006.01); H03F 3/195 (2006.01); H01L 29/16 (2006.01); H01L 25/07 (2006.01); H01L 25/16 (2006.01);
U.S. Cl.
CPC ...
H01L 23/66 (2013.01); H01L 25/072 (2013.01); H01L 25/16 (2013.01); H01L 25/162 (2013.01); H01L 29/1602 (2013.01); H01L 29/1608 (2013.01); H03F 3/195 (2013.01); H01L 2223/66 (2013.01); H01L 2223/6611 (2013.01); H01L 2223/6644 (2013.01); H01L 2223/6683 (2013.01); H01L 2224/40 (2013.01); H01L 2224/49175 (2013.01);
Abstract

A high frequency semiconductor amplifier includes an input circuit, a first semiconductor element, first bonding wires, an interstage circuit, second bonding wires, a second semiconductor element, third bonding wires, an output circuit, fourth bonding wires and a package. The input circuit includes a first DC blocking capacitor, an input transmission line, a first input pad part, and a first bias circuit. The interstage circuit includes a second DC blocking capacitor, an interstage transmission line, a first output pad part, and a second bias circuit, a microstrip line divider, and a second input pad part. The output circuit includes a second output pad part, a microstrip line combiner, a third DC blocking capacitor, an output transmission line, and a fourth bias circuit. The first and second semiconductor elements, the input circuit, the interstage circuit, and the output circuit are bonded to the package.


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