The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 17, 2018
Filed:
May. 31, 2017
Fuji Electric Co., Ltd., Kanagawa, JP;
Hideaki Matsuyama, Hino, JP;
FUJI ELECTRIC CO., LTD., Kanagawa, JP;
Abstract
There is a problem that even if impurities are made to thermally diffuse in a temperature range of 700° C.-1150° C., a good ohmic contact cannot be formed in a p-type group-III nitride semiconductor layer. Provided is a semiconductor device manufacturing method having a group-III nitride semiconductor substrate and a p-type group-III nitride semiconductor layer on the group-III nitride semiconductor substrate, including forming a magnesium containing layer on and in direct contact with the p-type group-III nitride semiconductor layer; and annealing the p-type group-III nitride semiconductor layer at a temperature more than or equal to 1300° C. to form a p-type region which contains magnesium as an impurity in the p-type group-III nitride semiconductor layer located immediately below the magnesium containing layer.