The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 10, 2018

Filed:

Feb. 21, 2017
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Inventors:

Sang Hoon Ha, Seongnam-si, KR;

Ji Yong Park, Seoul, KR;

Kwang Hyun Lee, Seongnam-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04N 5/357 (2011.01); H01L 27/146 (2006.01); H04N 5/363 (2011.01); H04N 5/365 (2011.01); H04N 5/3745 (2011.01); H04N 5/378 (2011.01);
U.S. Cl.
CPC ...
H04N 5/3575 (2013.01); H01L 27/14634 (2013.01); H01L 27/14645 (2013.01); H04N 5/363 (2013.01); H04N 5/3658 (2013.01); H04N 5/378 (2013.01); H04N 5/37455 (2013.01);
Abstract

A correlated double sampling (CDS) circuit includes a comparator and a first circuit. The comparator including, a first input terminal, a second input terminal, at least one output terminal, and a plurality of first transistors operably coupled between the at least one output terminal and the first and second input terminals. The first circuit includes at least one second transistor, the at least one second transistor operably coupled to the at least one output terminal and one of the first input terminal and the second input terminal, the at least one second transistor having at least one of (i) a different number of layers than the first transistors, and (ii) a different dimension than the first transistors.


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