The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 10, 2018

Filed:

Jun. 24, 2014
Applicant:

Institute of Semiconductors, Chinese Academy of Sciences, Beijing, CN;

Inventors:

Xiaodong Liu, Beijing, CN;

Nanjian Wu, Beijing, CN;

Haiyong Wang, Beijing, CN;

Wenfeng Lou, Beijing, CN;

Jingjing Chen, Beijing, CN;

Zhao Zhang, Beijing, CN;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03L 7/093 (2006.01); H03L 7/099 (2006.01); H04B 1/40 (2015.01); H02M 3/07 (2006.01); H03L 7/089 (2006.01); H03L 7/193 (2006.01);
U.S. Cl.
CPC ...
H03L 7/099 (2013.01); H02M 3/07 (2013.01); H03L 7/0898 (2013.01); H03L 7/093 (2013.01); H04B 1/40 (2013.01); H03L 7/193 (2013.01); H03L 2207/06 (2013.01);
Abstract

The present disclosure discloses a multi-standard performance reconfigurable I/Q orthogonal carrier generator. The generator may implement a continuously covered I/Q carrier output of 0.1-5 GHz and continuously covered differential signal outputs of 5-10 GHz and 1.5-3 GHz by means of reasonable frequency assignment; also, carrier signals under various frequencies with different loop bandwidths, different phase noises, different power consumption levels and different locking times can be generated by configuring a programmable charge pump (), a loop filter () parameter, a multi-path voltage-controlled oscillator () and a first multiplexer () corresponding thereto, a five-stage-division-by-two frequency division link () and a corresponding second multiplexer () and third multiplexer (), so as to implement generation of a multi-standard performance reconfigurable I/Q orthogonal carrier.


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