Anti-fuse type nonvolatile memory cells, arrays thereof, and methods of operating the same

Abstract

An anti-fuse type nonvolatile memory cell includes a semiconductor layer having a first conductivity type, a junction region having a second conductivity type and a trench isolation layer disposed in an upper portion of the semiconductor layer spaced apart from each other by a channel region, an anti-fuse insulation pattern disposed on the channel region, a gate electrode disposed on the anti-fuse insulation pattern, a gate spacer disposed on sidewalls of the anti-fuse insulation pattern and the gate electrode, a word line connected to the gate electrode, and a bit line connected to the junction region. The anti-fuse insulation pattern is broken if a first bias voltage and a second bias voltage are applied to the word line and the bit line, respectively.