The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 10, 2018

Filed:

Mar. 24, 2017
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Inventors:

Jong-Hoon Jung, Seongnam-si, KR;

Sung-Hyun Park, Hwaseong-si, KR;

Woo-Jin Rim, Suwon-si, KR;

Assignee:

SAMSUNG ELECTRONICS CO., LTD., Suwon-si, Gyeonggi-Do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01); G11C 11/419 (2006.01); G11C 11/418 (2006.01);
U.S. Cl.
CPC ...
G11C 11/419 (2013.01); G11C 11/418 (2013.01);
Abstract

A memory device includes a memory cell array including a plurality of memory cells, a plurality of word lines connected to the plurality of memory cells, a plurality of bit lines connected to the plurality of memory cells, a plurality of complementary bit lines connected to the plurality of memory cells, a plurality of auxiliary bit lines, a plurality of auxiliary complementary bit lines, and a switch circuit. The switch circuit electrically connects the plurality of auxiliary bit lines to the plurality of bit lines during a write operation, electrically connects the plurality of auxiliary complementary bit lines to the plurality of complementary bit lines during the write operation, electrically disconnects the plurality of auxiliary bit lines from the plurality of bit lines during a read operation, and electrically disconnects the plurality of auxiliary complementary bit lines from the plurality of complementary bit lines during the read operation.


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