The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 10, 2018
Filed:
Apr. 19, 2016
International Business Machines Corporation, Armonk, NY (US);
Rodrigo Alvarez-Icaza Rivera, San Jose, CA (US);
John V. Arthur, Mountain View, CA (US);
John E. Barth, Jr., Williston, VT (US);
Andrew S. Cassidy, San Jose, CA (US);
Subramanian S. Iyer, Mount Kisco, NY (US);
Bryan L. Jackson, Fremont, CA (US);
Paul A. Merolla, Palo Alto, CA (US);
Dharmendra S. Modha, San Jose, CA (US);
Jun Sawada, Austin, TX (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
Embodiments of the invention relate to processor arrays, and in particular, a processor array with interconnect circuits for bonding semiconductor dies. One embodiment comprises multiple semiconductor dies and at least one interconnect circuit for exchanging signals between the dies. Each die comprises at least one processor core circuit. Each interconnect circuit corresponds to a die of the processor array. Each interconnect circuit comprises one or more attachment pads for interconnecting a corresponding die with another die, and at least one multiplexor structure configured for exchanging bus signals in a reversed order.