Post-program conditioning of stacked memory cells prior to an initial read operation

Abstract

Method and apparatus for managing data in a stacked semiconductor memory, such as but not limited to a three dimensional (3D) NAND flash memory array. In some embodiments, a data set is written to the memory array by programming a stack of memory cells to a desired set of program states. A first set of pulses is applied to verify the memory cells conform to the desired set of program states. The verified stack of memory cells are subsequently conditioned by applying a second set of pulses to remove accumulated charge from a shared channel region of the stack. The conditioning of the memory cells reduces a step-wise increase in the number of read errors during the first read operation as compared to subsequent read operations on the memory cells.