The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 10, 2018

Filed:

Sep. 16, 2015
Applicant:

Sunedison Semiconductor Limited (Uen201334164h), Singapore, SG;

Inventors:

Igor Rapoport, Eugene, OR (US);

Robert James Crepin, Creve Coeur, MO (US);

Patrick Alan Taylor, West Linn, OR (US);

Assignee:

SunEdison Semiconductor Limited, St. Peters, MO (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/66 (2006.01); H01L 21/322 (2006.01); H01L 21/324 (2006.01); G01R 31/26 (2014.01); G01R 31/28 (2006.01); G01R 35/00 (2006.01); H01L 21/265 (2006.01); H01L 29/167 (2006.01); H01L 29/36 (2006.01); H01L 21/266 (2006.01); H01L 29/207 (2006.01);
U.S. Cl.
CPC ...
G01R 35/007 (2013.01); G01R 31/2648 (2013.01); H01L 21/266 (2013.01); H01L 21/2654 (2013.01); H01L 21/26506 (2013.01); H01L 21/324 (2013.01); H01L 29/167 (2013.01); H01L 29/207 (2013.01); H01L 29/36 (2013.01); G01R 31/2831 (2013.01); H01L 21/3221 (2013.01); H01L 22/12 (2013.01); H01L 22/14 (2013.01);
Abstract

A method of preparing an iron-implanted semiconductor wafer for use in surface photovoltage iron mapping and other evaluation techniques. A semiconductor wafer is implanted with iron through the at least two different regions of the front surface of the semiconductor at different iron implantation densities, and the iron-implanted semiconductor wafer is annealed at a temperature and duration sufficient to diffuse implanted iron into the bulk region of the semiconductor wafer.


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