The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 03, 2018

Filed:

Oct. 12, 2015
Applicant:

Fotonation Cayman Limited, San Jose, CA (US);

Inventor:

Andrew Kenneth John McMahon, Menlo Park, CA (US);

Assignee:

FotoNation Cayman Limited, San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04N 5/341 (2011.01); H04N 5/374 (2011.01); H04N 9/09 (2006.01); H04N 5/345 (2011.01); H04N 5/365 (2011.01); H04N 5/3745 (2011.01); H04N 5/378 (2011.01); H04N 9/04 (2006.01); H04N 5/232 (2006.01);
U.S. Cl.
CPC ...
H04N 5/341 (2013.01); H04N 5/23232 (2013.01); H04N 5/345 (2013.01); H04N 5/3653 (2013.01); H04N 5/378 (2013.01); H04N 5/3742 (2013.01); H04N 5/3745 (2013.01); H04N 9/045 (2013.01); H04N 9/09 (2013.01);
Abstract

Architectures for imager arrays configured for use in array cameras in accordance with embodiments of the invention are described. One embodiment of the invention includes a plurality of focal planes, where each focal plane comprises a two dimensional arrangement of pixels having at least two pixels in each dimension and each focal plane is contained within a region of the imager array that does not contain pixels from another focal plane, control circuitry configured to control the capture of image information by the pixels within the focal planes, where the control circuitry is configured so that the capture of image information by the pixels in at least two of the focal planes is separately controllable, sampling circuitry configured to convert pixel outputs into digital pixel data, and output interface circuitry configured to transmit pixel data via an output interface.


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