The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 03, 2018

Filed:

Feb. 11, 2015
Applicant:

National Instruments Corporation, Austin, TX (US);

Inventors:

Chen Chang, Fremont, CA (US);

Kevin B. Camera, Walnut Creek, CA (US);

Alexander Williams, Oakland, CA (US);

Brian Jenkins, Walnut Creek, CA (US);

Ellery Cochell, Hayward, CA (US);

Robert W. Brodersen, Berkeley, CA (US);

John C. Wawrzynek, Berkeley, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 7/38 (2006.01); H03K 19/173 (2006.01); H03K 19/177 (2006.01); G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
H03K 19/17728 (2013.01); G06F 17/5054 (2013.01); H03K 19/17756 (2013.01);
Abstract

A design environment for FPGA applications enables configuration of an FPGA platform to include a user design and one or more interface units, which the user design can use to access one or more external modules/devices without needing any particular knowledge of the structure and operation of such modules/devices. The interface unit corresponding to an external device/module, under the control of an operating environment, can establish a communication between the user design and the external module/device. An external processing module can use an interface unit to monitor and/or control a user design.


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