The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 03, 2018
Filed:
Mar. 10, 2017
Applicants:
Tuvia Liran, Qiryat Tivon, IL;
Neil Feldman, Misgav, IL;
Uzi Zangi, Hod-Hasharon, IL;
Inventors:
Assignee:
PLSense Ltd., Yokneam Elit, IL;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/0175 (2006.01); H03K 19/0185 (2006.01); H03K 19/00 (2006.01);
U.S. Cl.
CPC ...
H03K 19/018521 (2013.01); H03K 19/0013 (2013.01);
Abstract
A method for implementing a CMOS input buffer that consumes very low current even when input levels are less than full swing. An additional optional stage enables conversion to very low voltage swing. The circuit can be manufactured with a standard CMOS processing technology and with high immunity to variation of process parameters. The circuit provides some hysteresis response, enhancing the input voltage margin.