The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 03, 2018

Filed:

May. 02, 2016
Applicant:

Fci Inc, Gyeonggi-do, KR;

Inventors:

DongHyun Ko, Gyeonggi-do, KR;

Myung Woon Hwang, Gyeonggi-do, KR;

Assignee:

FCI INC, Gyeonggi-Do, KR;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03F 3/04 (2006.01); H03F 3/26 (2006.01); H03F 1/30 (2006.01); H03F 3/193 (2006.01); H03F 1/32 (2006.01); H03F 3/30 (2006.01);
U.S. Cl.
CPC ...
H03F 1/303 (2013.01); H03F 1/308 (2013.01); H03F 1/3217 (2013.01); H03F 3/193 (2013.01); H03F 3/3011 (2013.01); H03F 1/301 (2013.01); H03F 1/302 (2013.01); H03F 1/307 (2013.01); H03F 3/3066 (2013.01); H03F 3/3076 (2013.01); H03F 2200/18 (2013.01); H03F 2200/294 (2013.01); H03F 2200/318 (2013.01); H03F 2200/451 (2013.01); H03F 2203/30084 (2013.01); H03F 2203/30117 (2013.01);
Abstract

An inductor-less low noise amplifier (LNA) with high linearity is disclosed. The low noise amplifier includes: an input signal stage receiving an input signal; a first amplifier configured to receive the input signal, generate a first amplification signal by amplifying the received input signal, and output the generated first amplification signal, as a first output signal, to a first output terminal; a second amplifier configured to receive the input signal, generate a second amplification signal by amplifying the received input signal, and output the generated second amplification signal, as a second output signal, to a second output terminal; an output signal stage outputting a superimposition signal obtained by superimposing the first output signal and the second output signal; a first resistor feeding back the superimposition signal to the input signal stage; and a switch connecting/disconnecting between the input signal stage and the output signal stage.


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