The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 03, 2018

Filed:

Aug. 12, 2016
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Anthony J. Annunziata, Stamford, CT (US);

Ching-Tzu Chen, Ossining, NY (US);

Joel D. Chudow, Bronx, NY (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 51/05 (2006.01); H01L 29/786 (2006.01); H01L 29/16 (2006.01); H01L 29/06 (2006.01); H01L 21/02 (2006.01); H01L 21/283 (2006.01); H01L 29/20 (2006.01); H01L 29/24 (2006.01); H01L 21/04 (2006.01); H01L 51/00 (2006.01); H01L 21/441 (2006.01); H01L 29/66 (2006.01); H01L 29/778 (2006.01); G01N 27/414 (2006.01); H01L 43/08 (2006.01); H01L 49/02 (2006.01); H01L 23/532 (2006.01); H01L 21/768 (2006.01);
U.S. Cl.
CPC ...
H01L 51/0541 (2013.01); G01N 27/414 (2013.01); H01L 21/0254 (2013.01); H01L 21/02527 (2013.01); H01L 21/02568 (2013.01); H01L 21/02606 (2013.01); H01L 21/043 (2013.01); H01L 21/283 (2013.01); H01L 21/441 (2013.01); H01L 29/0665 (2013.01); H01L 29/0673 (2013.01); H01L 29/1606 (2013.01); H01L 29/2003 (2013.01); H01L 29/24 (2013.01); H01L 29/66045 (2013.01); H01L 29/66969 (2013.01); H01L 29/778 (2013.01); H01L 29/78684 (2013.01); H01L 29/78696 (2013.01); H01L 51/0048 (2013.01); H01L 51/0558 (2013.01); G01N 27/4141 (2013.01); G01N 27/4146 (2013.01); H01L 21/7682 (2013.01); H01L 23/53276 (2013.01); H01L 28/60 (2013.01); H01L 43/08 (2013.01); H01L 2221/1094 (2013.01);
Abstract

Embodiments of the invention include a method for fabricating a semiconductor device and the resulting structure. A substrate is provided. A plurality of metal portions are formed on the substrate, wherein the plurality of metal portions are arranged such that areas of the substrate remain exposed. A thin film layer is deposited on the plurality of metal portions and the exposed areas of the substrate. A dielectric layer is deposited, wherein the dielectric layer is in contact with portions of the thin film layer on the plurality of metal portions, and wherein the dielectric layer is not in contact with portions of the thin film layer on the exposed areas of the substrate such that one or more enclosed spaces are present between the thin film layer on the exposed areas of the substrate and the dielectric layer.


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