The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 03, 2018

Filed:

Mar. 03, 2016
Applicant:

Hitachi Kokusai Electric Inc., Tokyo, JP;

Inventors:

Hideki Horita, Toyama, JP;

Risa Yamakoshi, Toyama, JP;

Masato Terasaki, Toyama, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); C23C 16/40 (2006.01); C23C 16/44 (2006.01); C23C 16/455 (2006.01);
U.S. Cl.
CPC ...
H01L 21/02164 (2013.01); C23C 16/401 (2013.01); C23C 16/4408 (2013.01); C23C 16/45502 (2013.01); C23C 16/45527 (2013.01); C23C 16/45561 (2013.01); H01L 21/0228 (2013.01); H01L 21/02211 (2013.01);
Abstract

A technique capable of suppressing the generation of foreign matter in a process container involves a method of manufacturing a semiconductor device including: (a) supplying a source gas to a substrate in a process container; (b) supplying an inert gas to an inner wall of an opening of the process container at a first flow rate while performing (a); (c) supplying a reactive gas to the substrate; and (d) supplying the inert gas to the inner wall at a second flow rate lower than the first flow rate while performing (c).


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