The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 03, 2018

Filed:

Jun. 15, 2015
Applicant:

Lg Display Co., Ltd., Seoul, KR;

Inventors:

Jung-Min Lee, Paju-si, KR;

Juhn Suk Yoo, Seoul, KR;

Ji No Lee, Paju-si, KR;

Jae Soo Park, Goyang-si, KR;

Chang Heon Kang, Paju-si, KR;

Ho Young Ko, Paju-si, KR;

Soo Hong Kim, Goyang-si, KR;

Sung Ki Hong, Cheongwon-gun, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/038 (2013.01); G09G 3/3233 (2016.01); H01L 27/32 (2006.01);
U.S. Cl.
CPC ...
G09G 3/3233 (2013.01); H01L 27/3272 (2013.01); H01L 27/3279 (2013.01); G09G 2300/0426 (2013.01); G09G 2300/0814 (2013.01); G09G 2300/0819 (2013.01); G09G 2300/0852 (2013.01); G09G 2300/0861 (2013.01); G09G 2300/0866 (2013.01); G09G 2380/02 (2013.01); H01L 27/3262 (2013.01); H01L 2227/323 (2013.01); H01L 2227/326 (2013.01);
Abstract

An electronic display panel comprising a plastic substrate; a bottom shield metal (BSM) on the plastic substrate; a thin-film transistor (TFT) on the BSM, the TFT and the BSM at least partially overlapping each other; and an active buffer layer between the TFT and the BSM, wherein the BSM is connected to one of a gate electrode, a source electrode, and a drain electrode of the TFT. A bottom shield metal (BSM) on the plastic substrate, the BSM located to minimize formation of a back channel in a pixel circuit by trapped charges of the plastic substrate, the pixel circuit in a pixel area defined by a gate line and a data line on the plastic substrate, the pixel circuit on the active buffer layer including a plurality of TFTs and a plurality of component interconnecting nodes.


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